? 1/7 main product characteristics where emi filtering in esd sensitive equipment is required: mobile phones and communication systems computers, printers and mcu boards description the EMIF06-10006F2 is a highly integrated devices designed to suppress emi/rfi noise in all systems subjected to electromagnetic interferences. the emif06 flip-chip packaging means the package size is equal to the die size. this filter includes an esd protection circuitry which prevents the device from destruction when subjected to esd surges up 15kv. this device includes 6 emif filters. benefits emi symmetrical (i/o) low-pass filter high efficiency in emi filtering lead free package very low pcb space consuming: 2.92mm x 1.29mm very thin package: 0.65 mm high efficiency in esd suppression (iec61000-4-2 level 4) high reliability offered by monolithic integration high reducing of parasitic elements through integration and wafer level packaging complies with the following standards: iec 61000-4-2 level 4: 15kv (air discharge) 8kv (contact discharge) mil std 883e - method 3015-6 class 3: 30kv EMIF06-10006F2 6 lines emi filter and esd protection rev. 2 ? flip-chip (15 bumps) november 2004 figure 1: pin configuration (ball side) i4 o4 i1 o1 i6 gnd gnd gnd o6 i3 o3 i5 o5 i2 o2 987 654 321 a b c ipad? tm: ipad is a trademark of stmicroelectronics. table 1: order code part number marking EMIF06-10006F2 ft
EMIF06-10006F2 2/7 figure 2: basic cell configuration table 2: absolute ratings (limiting values) table 3: electrical characteristics (t amb = 25 c) symbol parameter and test conditions value unit p r dc power per resistance 0.1 w p t total dc power per package 0.6 w t j maximum junction temperature 125 c t op operating temperature range - 40 to + 85 c t stg storage temperature range 125 c symbol parameter v br breakdown voltage i rm leakage current @ v rm v rm stand-off voltage v cl clamping voltage r d dynamic impedance i pp peak pulse current r i/o series resistance between input and output c line capacitance per line symbol test conditions min. typ. max. unit v br i r = 1 ma 5.5 7 9 v i rm v rm = 3.3 v per line 500 na r i/o i = 10 ma 80 100 120 ? c line v r = 2.5 v, f = 1 mhz, 30 mv (on filter cells) 50 60 70 pf output 4 output 5 output 6 input 1 30pf 30pf 100 ? output 1 input 4 input 5 input 6 30pf 30pf 100 ? 30pf 30pf 100 ? 30pf 30pf 100 ? input 2 output 2 100 ? 30pf 30pf input 3 output 3 30pf 30pf 100 ? i v i f v f i rm i r i pp v rm v br v cl
EMIF06-10006F2 3/7 figure 3: s21 (db) attenuation measurements and aplac simulation figure 4: analog crosstalk measurements figure 5: digital crosstalk measurements figure 6: esd response to iec61000-4-2 (+15kv air discharge) on one imput v(in) and one output v(out) figure 7: esd response to iec61000-4-2 (?15kv air discharge) on one imput v(in) and one output v(out) figure 8: line capacitance versus applied voltage for filter 100.0k 1.0m 10.0m 100.0m 1.0g -50.00 -37.50 -25.00 -12.50 0.00 db f/hz simulation measurement 100.0k 1.0m 10.0m 100.0m 1.0g -50.00 -37.50 -25.00 -12.50 0.00 db f/hz simulation measurement simulation measurement aplac 7.62 user: st microelectronics 100k 1m 10m 100m 1g 00 -25 -50 -75 -100 aplac 7.62 user: st microelectronics db db i3_o2.s2p f/hz 0 10 20 30 40 50 60 70 80 90 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v (v) r c(pf) f=1mhz v osc =30mv rms t j =25c
EMIF06-10006F2 4/7 figure 9: aplac model figure 10: aplac parameters EMIF06-10006F2 model ground return for each gnd bump oi * = output of each filter cell ii* = input of each filter cell oi* cz=41pf@0v cz=41pf@0v sub rs=100 lbump rbump rsub cbump ii* rsub lbump rbump cbump sub lbump rbump sub rsub lgnd rgnd cgnd cgnd cgnd aplacvar rs aplacvar cz aplacvar lbump aplacvar rbump aplacvar cbump aplacvar rsub aplacvar rgnd aplacvar lgnd aplacvar cgnd 100 41 pf 50 ph 20 m 1.2 pf 100 m 100 m 100 ph 0.15 pf ?
EMIF06-10006F2 5/7 figure 11: ordering information scheme figure 12: flip-chip package mechanical data figure 13: foot print recommendations figure 14: marking emif yy - xxx zz fx emi filter number of lines information package x = resistance value (ohms) z = capacitance value / 10(pf) or 3 letters = application 2 digits = version f = flip-chip x = 1: 500m, bump = 315m = 2: leadfree pitch = 500m, bump = 315m 2.92mm 50m 1.29mm 50m 435m 50 315m 50 501m 50 500m 50 250m 50 650m 65 copper pad diameter : 250m recommended , 300m max solder stencil opening : 330m solder mask opening recommendation : 340m min for 300m copper pad diameter 545 545 400 100 230 x y z w x w dot, st logo xx = marking yww = datecode (y = year ww = week) z = packaging location all dimensions in m e
EMIF06-10006F2 6/7 figure 15: flip-chip tape and reel specification st xxz yww e st xxz yww e dot identifying pin a1 location user direction of unreeling all dimensions in mm 4 +/- 0.1 8 +/- 0.3 4 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 ? 1.5 +/- 0.1 0.73 +/- 0.05 st xxz yww e table 4: ordering information note: more packing informations are available in the application note an1235: ?flip-chip: package description and recommendations for use? an1751: "emi filters: recommendations and measurements" ordering code marking package weight base qty delivery mode EMIF06-10006F2 fs flip-chip 5.4 mg 5000 tape & reel 7? table 5: revision history date revision description of changes sep-2004 1 first issue 19-nov-2004 2 figure 2 on page 2: basic cell configuration corrected for i/o5 and i/o6.
EMIF06-10006F2 7/7 information furnished is believed to be accurate and reliable. however, stmicroelectronics assu mes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replac es all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered tr ademark of stmicroelectronics. all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com
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